FLASH Graphics System and Architecture

The goal of this project is to develop new high performance graphics architectures for emerging parallel, data intensive systems.

Scalable computer technology is available and many important applications have been parallelized and run successfully on such machines. However, comparable scalable technology for graphics systems is not available. Given the importance of visualization to many military and commercial applications, e.g. nuclear stockpile stewardship, weather prediction, image analysis and target identification, flight simulators and distributed simulation environments, we believe that it is imperative to create a scalable graphics technology base. Our research focuses on building such scalable graphics technology, providing the ability to produce and manipulate imagery with several orders of magnitude more performance than currently available.

The key technical challenge is to find the right mix of hardware and software to support graphics and imaging efficiently on such machines. We plan on tackling this question by implementing a prototype graphics system that achieves at least 64-way scalable performance at over 90% efficiency. There are two key elements to our approach: data parallel rendering algorithms and appropriate architectural support in software and hardware.

Traditionally graphics systems have been built in a pipelined fashion as was done in the original flight simulators created under DARPA funding. However, more recently high-end workstations, such as the Silicon Graphics InfiniteReality, use small numbers (tens) of processors in a hybrid data parallel/pipelined architecture. Data parallelism exists in two forms: object parallelism (multiple graphics primitives), and image parallelism (multiple pixels). In this project we take this trend of increased data parallelism to its logical conclusion. Since graphics systems typically manipulate many objects and pixels, they map well onto data parallel architectures and programming models. Since this is by far and away the greatest source of parallelism in graphics systems, we believe this is the key to building a software graphics system on a parallel computer, and, further, we believe it will be the most common architecture underlying high performance graphics systems of the future. The second key feature of our approach is to appropriate hardware to efficiently support image display and low-level imaging operations such as z-buffering and compositing.

This project has several components:

Previous successful components to this project include:

Published Work

People

Past Collaborators

Sponsors

This project is sponsored by DARPA ITO. Additional support has been provided by Digital, Intel, NVIDIA, and SGI

Related Projects

The Stanford FLASH Project

The Stanford Imagine Project

The UNC PixelFlow Project


tpurcell@graphics.stanford.edu